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notícias da empresa sobre SK hynix disaggregating SSD controller cores

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empresa Notícias
SK hynix disaggregating SSD controller cores


SK hynix plans to equip upcoming SSD controllers with one hundred or more low-level processing cores to reduce workloads for the main controller CPU, which faces constraints on both performance and die space.


According to Korean media outlet TheElec, South Korea’s second-largest maker of memory and NAND chips is preparing for upcoming PCIe speed upgrades. The firm acknowledges that a single SSD controller CPU cannot keep pace as rising capacities and faster bus interfaces demand higher read/write I/O throughput. For this reason, it is developing compact specialized processing cores known as H-TPUs, or Hynix-Tensor Processing Units. These units handle low-level, repetitive read and write command processing, metadata management, and buffer control. This frees the primary CPU to focus on higher-level functions including storage policy management, error recovery and exception handling. These H-TPUs are distinct from Google’s AI-oriented TPUs.


Koo In-je, SK hynix Vice President of system-on-chip (SoC) design, delivered a presentation at the International SoC Design Conference (ISOCC) 2026 held in Incheon, South Korea. He stated: “SK Hynix decomposed the read and write processes of traditional SSD controllers into smaller tasks and structured the system so that numerous small H-TPUs process them in parallel.”


If the main SSD controller were required to handle all processing tasks for future high-capacity, high bus-speed generations — such as PCIe 6, 7 and 8, each doubling the bandwidth of its predecessor — the main CPU would need a larger physical footprint and consume too much power for practical deployment.


H-TPUs are tiny cores that occupy just 4 percent of the area of a standard general-purpose CPU core; SK hynix uses ARM Cortex-R8 CPUs in its latest SSD products. They also consume far less power, roughly 2.5 percent of the reference core. When inactive, these cores enter an idle state to cut power consumption. They feature a 4-stage pipeline with sequential execution architecture and are built for dedicated, targeted functions.


We understand SK hynix will integrate H-TPUs into its next-generation enterprise SSDs and SSD controllers, covering the AIN P high-performance, AIN B high-bandwidth and AIN D high-capacity drives. The technology is also expected to appear within the SK hynix-Sandisk HBF Technology.

 

Beijing Qianxing Jietong Technology Co., Ltd.
Sandy Yang/Global Strategy Director
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Tempo do bar : 2026-10-19 09:53:12 >> lista da notícia
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